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chibios:book:kernel_subsystems [2014/09/05 18:06] (current)
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 +====== RT Subsystems ======
 +
 +The RT kernel is logically divided into several subsystems, each subsystem is responsible for a specific aspect. The RT kernel is very scalable in functionality,​ it can go from a bare scheduler about 1kB in size up to a fully featured RTOS in 6kB of space, figures come from the Cortex-M version.
 +
 +===== Conventions =====
 +
 +For each subsystem, a list of API functions/​macros will be briefly described. The book is not meant as a replacement of the documentation so the fine details will not be included, however, a list of small useful code snippets will be provided explaining the use case of the subsystem and of the API.\\
 +It is recommended that the reader accesses the documentation for the fine details and requirements of the API functions where a complete understanding is required.
 +
 +===== Features Matrix =====
 +
 +This is a list of the features in RT that will be described in next sections:
 +
 +^RT_List_of_Features........... ​ ^Brief Description ​ ^
 +|**Full Threading Model** ​ |Real threads paradigm rather than simple "​tasks"​. ​ |
 +|**Fully Static** ​ |The kernel never allocates nor frees memory for its operations, the memory layout is fully defined at link time.  |
 +|**Priority Based Scheduling** ​ |Threads are executed based on their priority only.  |
 +|**Round Robin Scheduling** ​ |Multiple threads at the same priority level are allowed and scheduled using the round robing algorithm. The round robin can be both preemptive (fixed time slot) or cooperative. ​ |
 +|**Fully Preemptive** ​ |The kernel support preemption of system code where safe.  |
 +|**Virtual Timers** ​ |Software timers with tickless support. ​ |
 +|**Tickless Mode** ​ |The kernel can be configured to work without a periodic interrupt in order to reduce Jitter and save power. The tickless mode is transparent to the application. ​ |
 +|**Nested Interrupts Support** ​ |Support for nested interrupts on architectures supporting the feature. ​ |
 +|**Kernel Hooks** ​ |It is possible to hook code into important kernel paths in order to enhance or customize the functionality. ​ |
 +|**Separate IRQ Stack** ​ |Support for separate stack for exceptions. ​ |
 +|**Zero Latency Interrupts** ​ |Support for interrupts able to preempt the kernel. ​ |
 +|**ISR Abstraction** ​ |Architecture/​compiler-independent way to write ISRs.  |
 +|**Threads Registry** ​ |Runtime registry of the alive threads. ​ |
 +|**Thread Queues** ​ |Support for arbitrary queues of threads. ​ |
 +|**Counting Semaphores** ​ |Support for counter-based semaphores. ​ |
 +|**Binary Semaphores** ​ |Support for binary semaphores. ​ |
 +|**Mutexes** ​ |Support for mutexes, recursive or not.  |
 +|**Condition Variables** ​ |Support for Posix-like condition variables. ​ |
 +|**Event Sources** ​ |Support for event sources. ​ |
 +|**Event Flags** ​ |Support for event flags. ​ |
 +|**Messages** ​ |Support for synchronous messages exchange among threads. ​ |
 +|**Mailboxes** ​ |Support for asynchronous queues of messages among threads and/or ISRs.  |
 +|**I/O Queues** ​ |Support for I/O circular buffers. ​ |
 +|**Timeouts on Wait** ​ |Any wait primitive can have an optional timeout specification. ​ |
 +|**Composite Primitives** ​ |Any synchronization primitive can be combined with others to form powerful atomic constructs. ​ |